From 93dfab472801d86013229ab03d65898e005791dd Mon Sep 17 00:00:00 2001 From: Erin Date: Wed, 27 Aug 2025 16:56:01 -0400 Subject: [PATCH] add justfile for generating production outputs --- 48ish_soldered.kicad_pcb | 2 +- 48ish_soldered.kicad_pro | 2 +- 48ish_soldered_out.zip | Bin 128426 -> 128478 bytes 48ish_soldered_out/48ish_soldered-B_Cu.gbr | 4 ++-- 48ish_soldered_out/48ish_soldered-B_Mask.gbr | 4 ++-- 48ish_soldered_out/48ish_soldered-B_Paste.gbr | 4 ++-- .../48ish_soldered-B_Silkscreen.gbr | 4 ++-- .../48ish_soldered-Edge_Cuts.gbr | 4 ++-- 48ish_soldered_out/48ish_soldered-F_Cu.gbr | 4 ++-- 48ish_soldered_out/48ish_soldered-F_Mask.gbr | 4 ++-- 48ish_soldered_out/48ish_soldered-F_Paste.gbr | 4 ++-- .../48ish_soldered-F_Silkscreen.gbr | 4 ++-- 48ish_soldered_out/48ish_soldered-NPTH.drl | 8 ++++---- 48ish_soldered_out/48ish_soldered-PTH.drl | 4 ++-- 48ish_soldered_out/48ish_soldered-job.gbrjob | 2 +- Justfile | 13 +++++++++++++ README.md | 6 ++++-- 17 files changed, 44 insertions(+), 29 deletions(-) create mode 100644 Justfile diff --git a/48ish_soldered.kicad_pcb b/48ish_soldered.kicad_pcb index 867bc5b..bf0cd24 100644 --- a/48ish_soldered.kicad_pcb +++ b/48ish_soldered.kicad_pcb @@ -75,7 +75,7 @@ (mirror no) (drillshape 0) (scaleselection 1) - (outputdirectory "/home/erin/Downloads/48ish-out") + (outputdirectory "48ish_soldered_out/") ) ) (net 0 "") diff --git a/48ish_soldered.kicad_pro b/48ish_soldered.kicad_pro index 83336cd..9f0351c 100644 --- a/48ish_soldered.kicad_pro +++ b/48ish_soldered.kicad_pro @@ -266,7 +266,7 @@ "gencad": "", "idf": "", "netlist": "", - "plot": "/home/erin/Downloads/48ish-out", + "plot": "48ish_soldered_out/", "pos_files": "", "specctra_dsn": "", "step": "", diff --git a/48ish_soldered_out.zip b/48ish_soldered_out.zip index 671fe4e1373b40bb1f59b5a3df4e5669e7f7c072..acd5be61b1cff7c41edbacf5f9263a8e88c596d5 100644 GIT binary patch delta 306 zcmZ4Wn*H8ucG&=LW)?065I9jJ6%A%U31J4A$%4~GWI{tY8JNR=ugyqJS)Wl_!Og(P z@`9Ox0ZcR+ZZ%|l_CZ~a8J8InP}2k$-a0Z&XMD{lCJ`FK3NaAPu<0Qm8MPRFL5ftT zFZsx5#8fXdz2PIH+Vp=w4rBRr!%vJ+Onr(FvCW?tEtmwRPZpSNI9={DqZX6;%;^nR zfr<-0Ga4|)O<(w#F_QW9Wya}^SAoVUePJ|a217#Q?FG6KB;0NfNGCupDVb6?98A8)rM+S%{ zwg7KNCVS?Ifl@p$*(HsJU^%sk{cO`8d}P#ON)`fHpf=s;6QdDRvJy{D^q-d*1-KE`oS&}$ zg)xdLr#rr5RG!ZNmC=a#*()e7{VSs(GsinHPj~u>uZ%ogjVufd K!XFud#sL66&Q$RL diff --git a/48ish_soldered_out/48ish_soldered-B_Cu.gbr b/48ish_soldered_out/48ish_soldered-B_Cu.gbr index 16aa2a1..8b0cbce 100644 --- a/48ish_soldered_out/48ish_soldered-B_Cu.gbr +++ b/48ish_soldered_out/48ish_soldered-B_Cu.gbr @@ -1,12 +1,12 @@ %TF.GenerationSoftware,KiCad,Pcbnew,9.0.3-1.fc42*% -%TF.CreationDate,2025-08-27T16:10:00-04:00*% +%TF.CreationDate,2025-08-27T16:52:14-04:00*% %TF.ProjectId,48ish_soldered,34386973-685f-4736-9f6c-64657265642e,v1.0.0*% %TF.SameCoordinates,Original*% %TF.FileFunction,Copper,L2,Bot*% %TF.FilePolarity,Positive*% %FSLAX46Y46*% G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* -G04 Created by KiCad (PCBNEW 9.0.3-1.fc42) date 2025-08-27 16:10:00* +G04 Created by KiCad (PCBNEW 9.0.3-1.fc42) date 2025-08-27 16:52:14* %MOMM*% %LPD*% G01* diff --git a/48ish_soldered_out/48ish_soldered-B_Mask.gbr b/48ish_soldered_out/48ish_soldered-B_Mask.gbr index 8da4365..21bb3ac 100644 --- a/48ish_soldered_out/48ish_soldered-B_Mask.gbr +++ b/48ish_soldered_out/48ish_soldered-B_Mask.gbr @@ -1,12 +1,12 @@ %TF.GenerationSoftware,KiCad,Pcbnew,9.0.3-1.fc42*% -%TF.CreationDate,2025-08-27T16:10:00-04:00*% +%TF.CreationDate,2025-08-27T16:52:14-04:00*% %TF.ProjectId,48ish_soldered,34386973-685f-4736-9f6c-64657265642e,v1.0.0*% %TF.SameCoordinates,Original*% %TF.FileFunction,Soldermask,Bot*% %TF.FilePolarity,Negative*% %FSLAX46Y46*% G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* -G04 Created by KiCad (PCBNEW 9.0.3-1.fc42) date 2025-08-27 16:10:00* +G04 Created by KiCad (PCBNEW 9.0.3-1.fc42) date 2025-08-27 16:52:14* %MOMM*% %LPD*% G01* diff --git a/48ish_soldered_out/48ish_soldered-B_Paste.gbr b/48ish_soldered_out/48ish_soldered-B_Paste.gbr index 666dde7..8ccea96 100644 --- a/48ish_soldered_out/48ish_soldered-B_Paste.gbr +++ b/48ish_soldered_out/48ish_soldered-B_Paste.gbr @@ -1,12 +1,12 @@ %TF.GenerationSoftware,KiCad,Pcbnew,9.0.3-1.fc42*% -%TF.CreationDate,2025-08-27T16:10:00-04:00*% +%TF.CreationDate,2025-08-27T16:52:14-04:00*% %TF.ProjectId,48ish_soldered,34386973-685f-4736-9f6c-64657265642e,v1.0.0*% %TF.SameCoordinates,Original*% %TF.FileFunction,Paste,Bot*% %TF.FilePolarity,Positive*% %FSLAX46Y46*% G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* -G04 Created by KiCad (PCBNEW 9.0.3-1.fc42) date 2025-08-27 16:10:00* +G04 Created by KiCad (PCBNEW 9.0.3-1.fc42) date 2025-08-27 16:52:14* %MOMM*% %LPD*% G01* diff --git a/48ish_soldered_out/48ish_soldered-B_Silkscreen.gbr b/48ish_soldered_out/48ish_soldered-B_Silkscreen.gbr index b1b5c83..429e217 100644 --- a/48ish_soldered_out/48ish_soldered-B_Silkscreen.gbr +++ b/48ish_soldered_out/48ish_soldered-B_Silkscreen.gbr @@ -1,12 +1,12 @@ %TF.GenerationSoftware,KiCad,Pcbnew,9.0.3-1.fc42*% -%TF.CreationDate,2025-08-27T16:10:00-04:00*% +%TF.CreationDate,2025-08-27T16:52:14-04:00*% %TF.ProjectId,48ish_soldered,34386973-685f-4736-9f6c-64657265642e,v1.0.0*% %TF.SameCoordinates,Original*% %TF.FileFunction,Legend,Bot*% %TF.FilePolarity,Positive*% %FSLAX46Y46*% G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* -G04 Created by KiCad (PCBNEW 9.0.3-1.fc42) date 2025-08-27 16:10:00* +G04 Created by KiCad (PCBNEW 9.0.3-1.fc42) date 2025-08-27 16:52:14* %MOMM*% %LPD*% G01* diff --git a/48ish_soldered_out/48ish_soldered-Edge_Cuts.gbr b/48ish_soldered_out/48ish_soldered-Edge_Cuts.gbr index ab698f0..f68d9a3 100644 --- a/48ish_soldered_out/48ish_soldered-Edge_Cuts.gbr +++ b/48ish_soldered_out/48ish_soldered-Edge_Cuts.gbr @@ -1,11 +1,11 @@ %TF.GenerationSoftware,KiCad,Pcbnew,9.0.3-1.fc42*% -%TF.CreationDate,2025-08-27T16:10:00-04:00*% +%TF.CreationDate,2025-08-27T16:52:14-04:00*% %TF.ProjectId,48ish_soldered,34386973-685f-4736-9f6c-64657265642e,v1.0.0*% %TF.SameCoordinates,Original*% %TF.FileFunction,Profile,NP*% %FSLAX46Y46*% G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* -G04 Created by KiCad (PCBNEW 9.0.3-1.fc42) date 2025-08-27 16:10:00* +G04 Created by KiCad (PCBNEW 9.0.3-1.fc42) date 2025-08-27 16:52:14* %MOMM*% %LPD*% G01* diff --git a/48ish_soldered_out/48ish_soldered-F_Cu.gbr b/48ish_soldered_out/48ish_soldered-F_Cu.gbr index 4cd8ca6..e3b3467 100644 --- a/48ish_soldered_out/48ish_soldered-F_Cu.gbr +++ b/48ish_soldered_out/48ish_soldered-F_Cu.gbr @@ -1,12 +1,12 @@ %TF.GenerationSoftware,KiCad,Pcbnew,9.0.3-1.fc42*% -%TF.CreationDate,2025-08-27T16:10:00-04:00*% +%TF.CreationDate,2025-08-27T16:52:14-04:00*% %TF.ProjectId,48ish_soldered,34386973-685f-4736-9f6c-64657265642e,v1.0.0*% %TF.SameCoordinates,Original*% %TF.FileFunction,Copper,L1,Top*% %TF.FilePolarity,Positive*% %FSLAX46Y46*% G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* -G04 Created by KiCad (PCBNEW 9.0.3-1.fc42) date 2025-08-27 16:10:00* +G04 Created by KiCad (PCBNEW 9.0.3-1.fc42) date 2025-08-27 16:52:14* %MOMM*% %LPD*% G01* diff --git a/48ish_soldered_out/48ish_soldered-F_Mask.gbr b/48ish_soldered_out/48ish_soldered-F_Mask.gbr index ba8d35c..e070f54 100644 --- a/48ish_soldered_out/48ish_soldered-F_Mask.gbr +++ b/48ish_soldered_out/48ish_soldered-F_Mask.gbr @@ -1,12 +1,12 @@ %TF.GenerationSoftware,KiCad,Pcbnew,9.0.3-1.fc42*% -%TF.CreationDate,2025-08-27T16:10:00-04:00*% +%TF.CreationDate,2025-08-27T16:52:14-04:00*% %TF.ProjectId,48ish_soldered,34386973-685f-4736-9f6c-64657265642e,v1.0.0*% %TF.SameCoordinates,Original*% %TF.FileFunction,Soldermask,Top*% %TF.FilePolarity,Negative*% %FSLAX46Y46*% G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* -G04 Created by KiCad (PCBNEW 9.0.3-1.fc42) date 2025-08-27 16:10:00* +G04 Created by KiCad (PCBNEW 9.0.3-1.fc42) date 2025-08-27 16:52:14* %MOMM*% %LPD*% G01* diff --git a/48ish_soldered_out/48ish_soldered-F_Paste.gbr b/48ish_soldered_out/48ish_soldered-F_Paste.gbr index 2de92c9..8894740 100644 --- a/48ish_soldered_out/48ish_soldered-F_Paste.gbr +++ b/48ish_soldered_out/48ish_soldered-F_Paste.gbr @@ -1,12 +1,12 @@ %TF.GenerationSoftware,KiCad,Pcbnew,9.0.3-1.fc42*% -%TF.CreationDate,2025-08-27T16:10:00-04:00*% +%TF.CreationDate,2025-08-27T16:52:14-04:00*% %TF.ProjectId,48ish_soldered,34386973-685f-4736-9f6c-64657265642e,v1.0.0*% %TF.SameCoordinates,Original*% %TF.FileFunction,Paste,Top*% %TF.FilePolarity,Positive*% %FSLAX46Y46*% G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* -G04 Created by KiCad (PCBNEW 9.0.3-1.fc42) date 2025-08-27 16:10:00* +G04 Created by KiCad (PCBNEW 9.0.3-1.fc42) date 2025-08-27 16:52:14* %MOMM*% %LPD*% G01* diff --git a/48ish_soldered_out/48ish_soldered-F_Silkscreen.gbr b/48ish_soldered_out/48ish_soldered-F_Silkscreen.gbr index 91edf7a..18b140b 100644 --- a/48ish_soldered_out/48ish_soldered-F_Silkscreen.gbr +++ b/48ish_soldered_out/48ish_soldered-F_Silkscreen.gbr @@ -1,12 +1,12 @@ %TF.GenerationSoftware,KiCad,Pcbnew,9.0.3-1.fc42*% -%TF.CreationDate,2025-08-27T16:10:00-04:00*% +%TF.CreationDate,2025-08-27T16:52:14-04:00*% %TF.ProjectId,48ish_soldered,34386973-685f-4736-9f6c-64657265642e,v1.0.0*% %TF.SameCoordinates,Original*% %TF.FileFunction,Legend,Top*% %TF.FilePolarity,Positive*% %FSLAX46Y46*% G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* -G04 Created by KiCad (PCBNEW 9.0.3-1.fc42) date 2025-08-27 16:10:00* +G04 Created by KiCad (PCBNEW 9.0.3-1.fc42) date 2025-08-27 16:52:14* %MOMM*% %LPD*% G01* diff --git a/48ish_soldered_out/48ish_soldered-NPTH.drl b/48ish_soldered_out/48ish_soldered-NPTH.drl index 687a9e9..52d1468 100644 --- a/48ish_soldered_out/48ish_soldered-NPTH.drl +++ b/48ish_soldered_out/48ish_soldered-NPTH.drl @@ -1,7 +1,7 @@ M48 -; DRILL file {KiCad 9.0.3-1.fc42} date 2025-08-13T23:51:21-0400 +; DRILL file {KiCad 9.0.3-1.fc42} date 2025-08-27T16:52:15-0400 ; FORMAT={-:-/ absolute / metric / decimal} -; #@! TF.CreationDate,2025-08-13T23:51:21-04:00 +; #@! TF.CreationDate,2025-08-27T16:52:15-04:00 ; #@! TF.GenerationSoftware,Kicad,Pcbnew,9.0.3-1.fc42 ; #@! TF.FileFunction,NonPlated,1,2,NPTH FMAT,2 @@ -16,8 +16,8 @@ T3C3.429 G90 G05 T1 -X45.5Y74.4 -X48.5Y74.4 +X45.5Y74.73 +X48.5Y74.73 T2 X-5.5Y68.0 X-5.5Y51.0 diff --git a/48ish_soldered_out/48ish_soldered-PTH.drl b/48ish_soldered_out/48ish_soldered-PTH.drl index 5c5c694..7670f3f 100644 --- a/48ish_soldered_out/48ish_soldered-PTH.drl +++ b/48ish_soldered_out/48ish_soldered-PTH.drl @@ -1,7 +1,7 @@ M48 -; DRILL file {KiCad 9.0.3-1.fc42} date 2025-08-13T23:51:21-0400 +; DRILL file {KiCad 9.0.3-1.fc42} date 2025-08-27T16:52:15-0400 ; FORMAT={-:-/ absolute / metric / decimal} -; #@! TF.CreationDate,2025-08-13T23:51:21-04:00 +; #@! TF.CreationDate,2025-08-27T16:52:15-04:00 ; #@! TF.GenerationSoftware,Kicad,Pcbnew,9.0.3-1.fc42 ; #@! TF.FileFunction,Plated,1,2,PTH FMAT,2 diff --git a/48ish_soldered_out/48ish_soldered-job.gbrjob b/48ish_soldered_out/48ish_soldered-job.gbrjob index f22dc36..b308992 100644 --- a/48ish_soldered_out/48ish_soldered-job.gbrjob +++ b/48ish_soldered_out/48ish_soldered-job.gbrjob @@ -5,7 +5,7 @@ "Application": "Pcbnew", "Version": "9.0.3-1.fc42" }, - "CreationDate": "2025-08-27T16:10:01-04:00" + "CreationDate": "2025-08-27T16:52:14-04:00" }, "GeneralSpecs": { "ProjectId": { diff --git a/Justfile b/Justfile new file mode 100644 index 0000000..5c28325 --- /dev/null +++ b/Justfile @@ -0,0 +1,13 @@ +default: + just --list + +gerbers: + kicad-cli pcb export gerbers 48ish_soldered.kicad_pcb --board-plot-params -o 48ish_soldered_out + +drills: + kicad-cli pcb export drill 48ish_soldered.kicad_pcb --excellon-separate-th -o 48ish_soldered_out + +plot: gerbers drills + +plot-zip: gerbers drills + zip 48ish_soldered_out.zip 48ish_soldered_out diff --git a/README.md b/README.md index f8cee19..4a5421a 100644 --- a/README.md +++ b/README.md @@ -6,10 +6,12 @@ A wireless, low-profile 47/48-key keyboard PCB. works with JLCPCB, haven't tried any other production houses, ymmv -- Gerbers: kicad plot output in `48ish_soldered_out` (pre-zipped for upload in `48ish_soldered_out.zip`) +production outputs automated with `just` (`apt install just` etc) and `kicad-cli` (it came free with your fucking kicad) + +- Gerbers and drill files: `just plot[-zip]`, output at `48ish_soldered_out[.zip]` - Board assembly: - Only parts on the backside need to be assembled - - BOM: `48ish_soldered_bom.csv` (not generated by kicad; includes specific JLCPCB part numbers, you may want to shop around for alternatives) + - BOM: `48ish_soldered_bom.csv` (not generated by kicad Yet:tm:; includes specific JLCPCB part numbers, you may want to shop around for alternatives) - Placements: `48ish_soldered-bottom-pos.csv` (generated by kicad, with column names manually edited to reflect [JLCPCB's requirements](https://jlcpcb.com/help/article/pick-place-file-for-pcb-assembly)) ## firmware???